PR Walkthroughs
Staging Large FMA Dots via SLM
Fix the PTSS overflow cliff on non-DPAS Intel iGPUs by staging tt.dot operands in SLM and tiling K.
TD Q-Load for Non-Power-of-2 GQA
When a GPU block-I/O fast path demands power-of-2 extents, pad the awkward axis, read wider, and mask the slack — taught through attention's Q load and prefill tile sizing.
GPU Optimization: 10 vLLM PRs
Learn optimization techniques from actual merged vLLM PRs with verified performance numbers.
PyTorch Optimization: 10 PRs
Learn optimization techniques from actual merged PyTorch PRs with verified performance numbers.
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